03/14/2011
LG
The primary document describing the technical design is the PXL section of the HFT TDR. The PXL detector system contains several major development efforts that define and verify the design concepts, leading to a complete final detector design. We will present design review results, documentation, simulation, prototyping and testing results in support of various aspects of the final design.
The primary cost and schedule documentation is presented project wide. The PXL subsystem costbook(s) and Basis of Estimate documentation is made available in the second section
Solid models of the full PXL detector system in the STAR inner detector system including fixturing and assembly pieces are posted online along with prototype test results (see below).
Solid
models
Solidworks based models of the system:
· http://www-rnc.lbl.gov/~wieman/HFT_PXL_model_inventory_jan_2011.htm
Cooling,
vibration and thermal deformation
We have completed both analysis and testing of a full sized mechanical prototype. The results are linked below:
· http://rnc.lbl.gov/hft/hardware/docs/Cooling_tests_Nov2009_v1.doc
The sensor design has been developed over 3 generations beginning with analog output sensors and moving to binary output sensors with integrated zero suppression. The following documentation is relevant to the development path.
Test of analog output sensors in the STAR environment – We tested the interface to the STAR trigger and measured the noise in the STAR environment with a beam test in STAR in 2007 using analog out sensors in a telescope configuration. The results in the form of a NIM paper may be found at:
Sensor review – we held a pre-production prototype review for the sensor design on Dec. 6-7, 2010 at BNL. The presentations show the performance characteristics of the prototype sensor designs that are the building blocks for the final sensor. The review presentations may be found at:
· Review webpage giving links to talks and supporting materials http://rnc.lbl.gov/hft/hardware/docs/sensor_review/index.html
· The review report with responses may be found at http://rnc.lbl.gov/hft/hardware/docs/sensor_review/summary_v2.doc
Sensor testing – We will probe test the sensors after dicing and thinning. We have already successfully probe tested the Phase-1 (binary output) sensors at 160 MHz and will extend this to the final sensors with a modified probe card design. Some documentation is listed below:
·
Probe_Testing_Phase1.pdf - A pdf
file describing the probe testing system design and testing that is planned for
the Phase-1 sensor.
·
sensor_tracking_proposal.doc - A doc file containing a
proposal for a method to do sensor tracking.
·
Phase_1_probe_card_patched.pdf - A pdf
file containing the schematic for the as built Phase-1 sensor probe card.
·
Phase_2_thinned_yield_initial.pdf - A document giving the
initial yield for Phase-2 sensors thinned with the scribe and back-thin method
of wafer processing.
· http://rnc.lbl.gov/hft/hardware/docs/PXL_yield_model_draft.pdf - A draft yield model for the production of working sectors from sensors, cables and sector tubes.
The development of an aluminum conductor based readout cable is described as a multi stage process. The development and supporting documentation may be found below:
· The http://rnc.lbl.gov/hft/hardware/docs/cd1/PXL_flex_cable_and_sys_test_v2.doc is a document describing the detailed cable development plan for the PXL detector.
· The PXL_RDO_cable_options_1.doc is a document that describes the aluminum conductor cable options considered for the PXL detector system in STAR.
· cable_power_gnd_trace_optimization.doc - A .doc file describing the optimizations done as the groundwork to designing a possible Phase-1 based 10 sensor cable with only 2 layers in the low mass region.
·
The CERN_PCB_meeting_notes.doc is a document that describes
the aluminum conductor cable fabrication capabilities of the CERN PCB shops.
· SCHEMATIC1 _ PH1_infrastructure_test_board.pdf - Schematic for the Phase-1 infrastructure testing board. This is a 10 sensor ladder prototype evaluation board.
The readout system has been prototyped and tested. It is currently the basis of all of our sensor and probe testing and ladder development. Some documentation of the review, and prototype testing may be found below:
Readout review – we held a pre-production prototype review for the design of the PXL readout system on Dec. 6-7, 2010 at BNL. The presentations show the design and performance characteristics of the prototype system for the PXL detector. The review presentations may be found at:
· Review webpage giving links to talks and supporting materials http://rnc.lbl.gov/hft/hardware/docs/elec_review/
· The review report with responses may be found at http://rnc.lbl.gov/hft/hardware/docs/elec_review/STAR HFT PXL Electronics and Sensor Review of June 23_responses.doc
Prototype system
schematics
The prototype RDO system schematics may be found at
·
Pixel_RDO_main_V5_int_motherboard.pdf - A pdf
of the orcad schematics for the Virtex-5 interface
board for the Phase-1 and Ultimate readout system.
·
PIXEL_RDO_MASS_TERM_V1.1.pdf - A pdf
of the orcad schematics for the Phase-1 and Ultimate
readout Mass termination board.
Prototype system testing
Prototype system testing documentation may be found below:
·
LVDS_test_report_1.pdf - A report on the results of
the HFT RDO LVDS data path test validating the data path design at 160 MHz.
The infrastructure documentation may be found below:
· The PXL_grounding_plan_v7.pdf is a document that gives the grounding plan for the PXL detector system in STAR.
·
The PXL_connectivity_docs.zip is a zip archive that contains
the full connectivity documentation for the PXL detector system in STAR.
· The https://eroom2.lbl.gov/eRoomReq/Files/ENGR/HFT/0_1304a/STAR_IDS_Interfaces_PXL.xls document is the set of mechanical, heat, etc. interfaces between the PXL detector and the inner detector support system.
· The interface between the PXL detector and the STAR Trigger may be found here http://www.star.bnl.gov/public/interfaces/old_stuff/trg_daq_int_v12.ps.
· The interface between the PXL detector and the STAR DAQ is hardware based on the CERN ALICE DDL fiber optic link. The data passed to the STAR event pool will have a format that is mutually agreed between the PXL and DAQ subsystems and in not yet completely defined.
The PXL subsystem costbooks contain detailed cost estimated for the lower level tasks that make up the tasks listed in the HFT resource loaded schedule. The BOE for each subtask is listed in columns R and S. Where the estimate includes a quotation or other documentation this is provided in a folder that is linked below.
The PXL costbook for 1.2.2 and 1.2.4 may be found at http://rnc.lbl.gov/hft/hardware/docs/cd23/PXL_1.2.2_1.2.4_breakdown_costs_v1.xlsx.
The PXL costbook for 1.2.2 and 1.2.4 may be found at http://rnc.lbl.gov/hft/hardware/docs/cd23/PXL_BOE.zip.
PXL 1.2.3 estimates are contained in the HFT project level resource loaded schedule.