The latchup_schematic.pdf is a mostly complete schematic for the test.
The alex_plan.txt shows Alexandre's plan for the test.
The MIMOSTAR_PROTO_TEST_BOARD_V2_EXTERNAL_POWER_SUPPLIES.pdf documents how to separate the digital and analog power supplies to the Mimostar2 chip. NOTE: we are only separating the analog power for this test. The digital power is controlled with the board power.
The mimostar_pcb2.pdf is the schematic the LEPSI Mimostar2 card.
The mimostar_pcb2_comp_ref.pdf shows the layout of the LEPSI Mimostar2 card with components labeled.
The latchup_v3_71_complete_JTAG_synchro_190506.vi is the Labview VI for the test.
The latchup_v3_71_complete_JTAG_synchro_190506_.vi is a newer Labview VI for the test.
The latchup_v3_71_complete_Described.vi is the newest and documanted Labview VI for the test.
The RSTB_SYNC.vi is a RSTB sending VI.
The http://tvdg10.phy.bnl.gov/index.html is the homepage for the SEU test facility at the Tandem at BNL.
The Latch_up_tests_doc_v2.pdf is a pdf document showing the results of the MIMOSTAR2 latchup test.
The Latch_up_tests_2009_schematic_page1.pdf is a schematic for the cables used in the test. (07/24/2009)
The Latch_up_tests_2009_schematic_page2.pdf is a schematic for the latch up monitoring/resetting USB-6800 DAQ box. (07/24/2009)
The LU_POWER_PCB.pdf is a schematic for the LU-protected power supply PCB for the PIXEL detector ladders. (07/24/2009)
The Latchup_test_2009_report_v02.pdf is a report on the Phase-1, SUZE, and Mimosa22 latch up and SEU test results. (07/24/2009)