LVDS_board_block_diagram.pdf - Block Diagram of the LVDS testing system for HFT RDO LVDS test. (12-04-2007)
PIXEL_LVDS_data_path_test.ppt - A .ppt presentation on the PIXEL RDO LVDS Data Path test given on 12/13/2007. (12-12-2007)
PIXEL_LVDS_TEST_LADDER.pdf - Schematic for the ladder mockup with LVDS drivers for the HFT RDO LVDS test. (12-11-2007)
PIXEL_LVDS_TEST_LADDER_SIMPLE-2.MAX - Orcad Layout file for the ladder mockup with LVDS drivers for the HFT RDO LVDS test. (12-12-2007)
PIXEL_LVDS_TEST_MASS_TERM.pdf - Schematic of the mass termination board mockup with separate buffered and unbuffered data paths to test. (01-09-2008)
PIXEL_LVDS_TEST_MASS_TERM.MAX - Orcad Layout file for the mass termination and LU protectrd power board for the HFT RDO LVDS test. (01-09-2008)
LVDS_TEST_V5_INTERFACE _ PAGE1.pdf - Schematic of the interface board to the Virtex-5 Development board. This boards contains both the LVDS test hardware and an SIU interface. (12-04-2007)
LVDS_TEST_V5_INTERFACE _ PAGE2.pdf - Schematic of the interface board to the Virtex-5 Development board. This boards contains both the LVDS test hardware and an SIU interface. (12-04-2007)
LVDS_TEST_V5_INTERFACE_BOARD_V1.1.MAX - Orcad Layout file for the Virtex-5 development kit interface board for the HFT RDO LVDS test. (01-09-2008)
FF1760_676_DUT_interface_data_base_120307_v2.xls - MS Excel file giving the connections, net names, pin numbers, etc. of the connections between the V5 interface board and the FF1760 Virtex-5 Development Board. This file is very useful for understanding the schematics above. (12-04-2007)
FF1760_676_DUT_interface_data_base_011708_v3.xls - Updated pin database - includes a 9 line patch to correct for nets assigned to a nonexisting bank. (01-17-2008)
LVDS_test_procedure.doc - A proposed testing procedure for the HFT RDO LVDS data path test. (03-03-2008)
LVDS_test_report_1.doc - A report on the results of the HFT RDO LVDS data path test. (06-03-2008)
LVDS_test_report_1.pdf - A report on the results of the HFT RDO LVDS data path test in .pdf format. (06-12-2008)
VHDCI_test_schematics.pdf - A schematic (.pdf format) for building testing boards for evaluating the suitability of using commercially built VHDCI cables and connectors for the PXL RDO system in. (04-25-2011)
VHDCI_and_cable_testing.docx - A proposal for testing VHDCI connectors and cables for use in the PXL RDO system. (04-25-2011)
VHDCI_and_cable_testing_results.docx -The results of the testing of VHDCI connectors and cables for use in the PXL RDO system. (01-19-2012)
FIN1108T - Fairchild LVDS 8 Port High Speed Repeater.
SN65LVDS104 - TI 4-port LVDS Repeater.
AFX-FF1760 User Guide - Xilinx AFX-FF1760 Virtex-5 Development Board User Guide.
AFX-FF1760 Schematics - Xilinx AFX-FF1760 Virtex-5 Development Board Schematics.
AFX-FF676 Schematics - Xilinx AFX-FF676 Virtex-5 De velopment Board Schematics.
Virtex-5 - Xilinx Virtex-5 Documentation Page.
SIU Guide - SIU User Guide.